This invention is in the field of digital circuits, and relates more particularly to low-power CMOS driver circuits capable of operating at high frequencies without dissipating significant power.
Standard CMOS drivers, having a circuit configuration such as that shown by transistors 510 and 512 in FIG. 5, are normally quite adequate for driving relatively large off-chip capacitive loads, such as the gate of a power transistor. However, during each transition of the input waveform, there is an instant of time when both the NMOS and PMOS transistors will conduct simultaneously. This will permit current to flow directly from the power supply terminal (Vcc) to the common terminal (ground) through a relatively low impedance, thus dissipating unnecessary power. This phenomenon is known as shoot-through dissipation, and since it increases with frequency (as the number of input transitions per unit of time increases), as well as with the size of the driver, the use of standard CMOS drivers is typically limited to low-frequency (i.e., below about 100 KHz) applications and smaller drivers.
For operation at moderately higher frequencies (i.e. from about 100 KHz to about 1 MHz) the two CMOS driver transistors can be provided with separate gate drive signals. Then, by using a timing circuit, it can be ensured that there will be a slight time delay between activation of one transistor of the CMOS pair and deactivation of the other transistor, so that both transistors will never be on simultaneously, thus substantially preventing shoot-through current from flowing between the power supply terminal and ground.
However, for operation at still higher frequencies (i.e. above 1 MHz), the output driver size typically becomes very large, so that typical timing circuits are not capable of driving the output transistors with sufficient speed. In order to overcome this difficulty, CMOS predriver circuits can be used to boost the driving capability of the timing circuit to drive the output driver stage. However, at these higher frequencies, the predrivers themselves can be quite large, and, if conventional CMOS stages are used as predrivers, significant shoot-through power will be dissipated in the predrivers during transitions. Thus, even with the use of a timing circuit and predrivers, the maximum operating frequency of prior-art CMOS driver circuits is still limited by shoot-through dissipation to about 1 MHz.
Optimally, it would be desirable to have a CMOS driver circuit capable of driving relatively large off-chip capacitive loads (in the range of 1 to 2 nF), such as the gate of a power transistor, at frequencies in the range of several MHz without dissipating significant power due to shoot-through current.